📌 Manufacturing Barriers as 3D DRAM Shifts Toward Logic Processes
Competition in advanced memory may no longer be solely about making traditional DRAM processes more refined. SK hynix is exploring the development of next-generation 3D DRAM using foundry processes. If this direction materializes, the focus of manufacturing capabilities will partially shift toward logic processes, relevant engineering talent, and the ability to integrate advanced interconnects.
This is also why this path is worth watching. Memory manufacturers’ core investments in the past were mainly centered on memory cells and stacking processes; if 3D DRAM makes greater use of logic foundry capabilities, choices involving equipment, talent, and partners will all change. For parties with accumulated logic-process expertise, this may create more opportunities to participate in advanced memory manufacturing; for memory manufacturers, it means that R&D and implementation costs may rise, while dependence on external technological collaboration increases.
However, a change in process route does not mean capacity can be realized quickly. CXMT has already trial-produced HBM3, with an initial yield of approximately 25%, with the issue pointing to immature TSV technology. TSV is a key link that uses vertical channels to connect stacked chips. Lower yields mean that the same wafer input is difficult to convert into sufficient qualified products, while material, equipment, and wafer costs are also diluted across more defective products.
Therefore, in the short term, it is more important to distinguish between “being able to trial-produce” and “being able to supply stably.” There is still a lack of original company disclosures regarding the extent to which 3D DRAM adopts logic processes, the statistical basis for CXMT’s yield, and the pace of subsequent ramp-up. What can be confirmed at this stage is that manufacturing competition in high-end memory is extending, while yield remains a hard constraint determining the effectiveness of capacity expansion.
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